I found the solution to lack of instructions. If you vary the size of the instruction by instruction type, you can basically use all the bits with maximum spatial efficiency(I think.)

Previously, the size of the instruction was fixed to 4-bits, which limits the number of instruction to only 16. (The instruction type is saved in the EEPROM. After fetching the instruction type from the instruction number, some logic operations separate out the arguments and instruction(R1, R2, ALU Operations, Jump Conditions, ...) from the full instruction.)

Although this structure is simple and gets the job done, it severely limits the number of instructions.

So, what I thought of is this :

From the instruction #0 to #3, the system decodes the instruction as type 2 or 3, and from instruction #4 to #15, the system decodes it as type 0 or 1, and so on. This way, we can essentially use the "unused" bits of the instruction as the arguments for the instruction.

From the structure that I came up with, I made this logic system that parses the instruction into arguments by the given instruction type.

It's just a simple logic circuit that uses AND gates to direct the arguments from the instruction by the given instruction type. I don't know whether this design will work, but we will see.